BIST for Reconfigurable System on Chip (SOC) for Micro-Vibration Measurement

BIST for Reconfigurable System on Chip (SOC) for Micro-Vibration Measurement

Authors

  • Dr.B. Karthik

Keywords:

Output Response Analyzer, Test Pattern Generator, SoC and FPAA.

Abstract

This paper presents methodology for testing mixed signal circuits in the SOC
configured for micro vibration measurement. The SOC for micro vibration measurement
contains a Bi morph sensor and front end electronics containing an amplifier, peak
detector interface with A/D converter and memory. The amplifier is tested by applying
triangular stimuli input generated by Test Pattern Generator (TPG) configured in the FPGA.
The peak detector is tested by applying a test pulses generated by test generator system.
The outputs of the test circuit are analyzed by output response analyzer (ORA) in the FPGA.
The required hardware for testing analog as well as digital circuits of the SOC are
configured by the on chip portion of FPGA and FPAA. The whole SOC can be tested by
applying stimuli generated in TPG and checking the output by comparing patterns stored in
memory with reference pattern using ORA. Simulation results are reported for counter and
test ADC.

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Published

30-07-2018

Issue

Section

Articles
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